To provide a display that can have a gate insulating film of a thin film transistor and an inter-layer insulating film at a wiring intersection part formed to suitable thicknesses respectively without increasing mask processes.
The method of manufacturing the display includes the processes of: forming first and second thin film transistors on an insulating substrate; forming the gate insulating film covering a gate electrode of the first thin film transistor, a gate electrode of the second thin film transistor, and a gate signal line; forming a dehydrogenated first amorphous silicon semiconductor layer on the insulating film; altering the first amorphous silicon semiconductor layer in a formation region of the first thin film transistor into a polycrystalline silicon semiconductor layer; etching the amorphous silicon semiconductor layer in a formation region of the first thin film transistor and a part of the insulating film from a surface in order; and forming a second amorphous silicon semiconductor layer on the insulating film while covering the polycrystalline silicon semiconductor layer and first amorphous silicon semiconductor layer.
KURIYAGAWA TAKESHI
MIYAKE HIDEKAZU
KAITO TAKUO
