両面研磨装置、半導体シリコンウェーハの両面研磨方法及び両面研磨シリコンウェーハの製造方法

Japanese Patent JP7435634

B2

To provide a double side polished silicon wafer having high surface qualities, such as few surface defects and low haze level, and a double side polishing apparatus capable of manufacturing such a double side polished silicon wafer.SOLUTION: Provided is a double side polishing apparatus including: upper and lower polishing plates, to each of which a polishing cloth is bonded; a slurry supply mechanism which supplies a slurry to the space between the upper and lower polishing plates; and a carrier for double side polishing apparatuses, the carrier being arranged between the upper and lower polishing plates, while being provided with a holding hole for holding a semiconductor silicon wafer that is sandwiched between the upper and lower polishing plates when polished. The carrier for double side polishing apparatuses is a metal carrier which has a contact angle with pure water of 50° or more on the front and back surfaces that are in contact with the polishing cloths, and the polishing cloths have a contact angle with pure water of 100° or more and a compression rate of 5.0% or more.SELECTED DRAWING: Figure 1

JP2000015557	POLISHING DEVICE
JP2007103834	SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
JP2009123861	METHOD OF MANUFACTURING EPITAXIAL WAFER

Yoshida Yoshiki

JP2022001288A

February 21, 2024

January 06, 2022

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Shin-Etsu Semiconductor Co., Ltd.

H01L21/304; B24B37/24; B24B37/28

JP2016039179A
JP2019072801A
JP2016196053A
JP2018195641A
JP2021057524A
JP2017100215A
JP2020513682A

WO2018105306A1

Mikio Yoshimiya
Toshihiro Kobayashi
Toru Otsuka

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