To provide a drive control device which prevents an increase in power consumption and breakage of a circuit element caused by abnormality in a gate start pulse signal in a display device including a gate driver consisting of a plurality of cascade connected ICs.
In a drive control device, a gate start pulse signal output from each IC (GDR1-GDR4) is input into a subsequent IC and also applied to a timing controller IC 100. The timing controller IC 100 compares a value of the gate start pulse signal output from each IC with an expectation value of the gate start pulse signal so as to determine presence/absence of abnormality. When there is the abnormality in the gate start pulse signal, the timing controller IC 100 executes a processing to stop the gate output from the IC to which the abnormal gate pulse signal is input.
| JP2002538510 | [Title of Invention] Sampler for image display device |
| JP2004085682 | DISPLAY DEVICE AND DISPLAY METHOD |
| JP6528965 | Head-up display device |
ITO TOSHIMITSU
| JP2009109955A | 2009-05-21 | |||
| JP2008241828A | 2008-10-09 | |||
| JPH09245494A | 1997-09-19 | |||
| JPH07281646A | 1995-10-27 | |||
| JP2011164585A | 2011-08-25 |
| WO2009116214A1 | 2009-09-24 |
Kenji Kawahara
Satoru Kawamoto