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Title:
エッジエミッティングレーザのモノリシックアレイ
Document Type and Number:
Japanese Patent JP5451784
Kind Code:
B2
Abstract:
A process for fabricating an electronic device including: depositing a layer comprising a semiconductor; liquid depositing a dielectric composition comprising a lower-k dielectric material, a higher-k dielectric material, and a liquid, wherein the lower-k dielectric material and the higher-k dielectric material are not phase separated prior to the liquid depositing; and causing phase separation of the lower-k dielectric material and the higher-k dielectric material to form a phase-separated dielectric structure wherein the lower-k dielectric material is in a higher concentration than the higher-k dielectric material in a region of the dielectric structure closest to the layer comprising the semiconductor, wherein the depositing the layer comprising the semiconductor is prior to the liquid depositing the dielectric composition or subsequent to the causing phase separation.

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Inventors:
Ilyan Woo
Had K. Mahabad
Ben G. Ong
Paul F. Smith
Application Number:
JP2012003967A
Publication Date:
March 26, 2014
Filing Date:
January 12, 2012
Export Citation:
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Assignee:
XEROX CORPORATION
International Classes:
H01L29/786; H01L21/312; H01L21/336; H01L51/05; H01L51/30; H01L51/40
Domestic Patent References:
JP2004241527A
JP6230386A
JP61144639A
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori