Title:
FLIP-FLOP CIRCUIT
Document Type and Number:
Japanese Patent JP2014103470
Kind Code:
A
Abstract:
To provide a flip-flop circuit capable of achieving excellent soft error resistance, low electric power, and area saving.
The flip-flop circuit (FF1) is DICE ACFF in which a DICE structure is applied to ACFF. Master latches (ML11, ML12) includes HCE elements (HCE11-HCE14) and AC elements (AC11-AC14) mutually adaptively connected, and PMOSs (PMOS11-PMOS14).
More Like This:
| WO/2004/098061 | FLIP-FLOP CIRCUIT ASSEMBLY |
| JP2933022 | FLIP-FLOP CIRCUIT |
Inventors:
KOBAYASHI KAZUTOSHI
KUBOTA KANTO
MASUDA MASAKI
KUBOTA KANTO
MASUDA MASAKI
Application Number:
JP2012252739A
Publication Date:
June 05, 2014
Filing Date:
November 16, 2012
Export Citation:
Assignee:
KYOTO INST OF TECHNOLOGY
International Classes:
H03K3/289
Attorney, Agent or Firm:
Harakenzo world patent & trademark