Title:
IN-PLANE INDUCTORS IN IC PACKAGES
Document Type and Number:
Japanese Patent JP2021141311
Kind Code:
A
Abstract:
To provide an integrated circuit (IC) package substrate.SOLUTION: An integrated circuit (IC) package substrate comprises a magnetic material embedded in a dielectric material. A first surface of the dielectric material is below the magnetic material, and a second surface of the dielectric material, opposite the first surface, is over the magnetic material. A metallization level comprising a first metal feature is embedded in the magnetic material. A second metal feature is at an interface between the magnetic material and the dielectric material. The second metal feature has a first sidewall in contact with the dielectric material, and a second sidewall in contact with the magnetic material.SELECTED DRAWING: Figure 2L
Inventors:
BRANDON C MARIN
TAREK IBRAHIM
PRITHWISH CHATTERJEE
HAIFA HARIRI
DENG YIKANG
LI C SHENG
SRINIVAS PIETAMBARAM
TAREK IBRAHIM
PRITHWISH CHATTERJEE
HAIFA HARIRI
DENG YIKANG
LI C SHENG
SRINIVAS PIETAMBARAM
Application Number:
JP2020203324A
Publication Date:
September 16, 2021
Filing Date:
December 08, 2020
Export Citation:
Assignee:
INTEL CORP
International Classes:
H01L23/12; H01F17/00; H01F17/04; H01L23/14; H05K1/16; H05K3/46
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Osamu Miyazaki
Tadahiko Ito
Osamu Miyazaki