Title:
INSTRUCTION FETCH CONTROL DEVICE
Document Type and Number:
Japanese Patent JP3845043
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To constitute an instruction buffer into a compact shape by improving the using efficiency of the instruction buffer.
SOLUTION: Each of a plurality of instruction buffers 1-i (i=0∼5) is provided with a data part 1a-i (i=0∼5) retaining (storing) an instruction row (instruction string) and a pointer part 1b-i (i=0∼5) indicating an instruction buffer 1 retaining the instruction string to be fed next to the instruction row retained in the instruction buffer 1. The instruction row is fed to an instruction executing part interpreting the instruction row by the indication of the pointer part 1b.
Inventors:
Masaki Ukai
Application Number:
JP2002191463A
Publication Date:
November 15, 2006
Filing Date:
June 28, 2002
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F9/38; (IPC1-7): G06F9/38
Domestic Patent References:
| JP4182735A | ||||
| JP2306340A | ||||
| JP4205427A | ||||
| JP5495139A | ||||
| JP2001166934A |
Attorney, Agent or Firm:
Yoshiyuki Osuga
Motoaki Hisagi
Motoaki Hisagi