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Patent Searching and Data


Title:
INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS62232954
Kind Code:
A
Abstract:

PURPOSE: To obtain a high density arithmetic operational unit with a good extending property and general purpose property by a method wherein an arithmetic operational part of the prescribed bit unit is arranged in one direction, and input-output parts of bit unit are arranged opposing with each other.

CONSTITUTION: An arithmetic opeational unit block consists of a plurality of arithmetic operational part 2, input parts 1 and output latches 4 of bit unit arranged in one direction pinching the arithmetic operational part 2, As a result, the bit can be changed to various widths, and also the arithmetic operational unit can be operated at a higher speed than a bit slicing system. General-purpose properties can be obtained by combining a data-shift part and the like, which can be divided for every bit, with the latches 4 and also by using the input parts 1 corresponding to the contents of the arithmetic operation. As the passing of windings between cells as in the case of the lay out in general is unnecessary, and as the position of the input-output of this arithmetic operational unit block is simple and the wiring region between blocks is small, a high density integration can be accomplished.


Inventors:
SAKURAI ITARU
Application Number:
JP7557486A
Publication Date:
October 13, 1987
Filing Date:
April 03, 1986
Export Citation:
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Assignee:
CANON KK
International Classes:
H01L21/822; H01L27/04; H03H17/02; H03H17/06; (IPC1-7): H01L27/04; H03H17/06
Attorney, Agent or Firm:
Yoshikazu Tani