PURPOSE: To prevent a through-current of an input side transistor (TR) by receiving directly a data signal at a gate of an MOSTR without using any pull- down resistor or a pull-up resistor so as to increase an input impedance.

CONSTITUTION: A data input from an input terminal 1 is inputted to the 1st gate of a 2-input AND5 and a gate of a clocked inverter 3, and an output of the inverter 3 is inputted to the 1st gate of a 2-input AND6. Further, a clock from an input terminal 2 is inputted to a clock input of the inverter 3, a gate of an inverter 4 and the 2nd gate of the ANDs 5, 6. Moreover, an output of the inverter 4 is fed to an inverting input of the inverter 3, an output of the AND5 is fed to the 1st gate of a 2-input NOR7 and an output of the AND6 is fed to the 2nd gate of an 2-input NOR8. The output of the NORs 7, 8 is inputted respectively to the 1st and 2nd gate of the NORs 8, 7, which constitute an FF circuit, an output of an output terminal 9 is inputted to a CMOS circuit of the next stage so as to improve the input impedance.