PURPOSE: To connect many nodes by providing a bypass for clock signal between nodes not adjacent to each other and using a signal extracted by a node closer to a management node among nodes combined by the bypass to eliminate jitter of other nodes.
CONSTITUTION: The bypass 5 is provided among nodes 1-3∼1-(n-1). The bypass 5 is used to send a clock signal extracted by the node 1-3 to the noide 1-(n-1) and no data signal is carried. When the data signal is sent in the direction of the arrow, the node 1-3 is extracted. The clock signal has less jitter and the clock signal extracted by the node 1-(n-1) has much jitter. Then the node 1-(n-1) is provided with a jitter elimination circuit shown in figure. In such a circuit, a signal having much jitter is inputted, plural phase output signals are obtained from delay circuits 7, 9, 11, 13 and the signal is inputted to a phase difference detection circuit 23, where the phase difference with a block signal CL from the hypass 5 is detected and a signal jidged to the optimum is outputted.
JPS6211335 | DATA TRANSMISSION CONTROL SYSTEM |
JPS6128254 | FAULTY NODE DISCONNECTING SYSTEM |
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