Title:
MANCHESTER CODE RECEIVER
Document Type and Number:
Japanese Patent JP3424600
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To extract a reception clock with an optimum phase by surely detecting a preamble independently of an operating frequency without the use of a fixed delay circuit.
SOLUTION: The receiver consists of a preamble detection circuit 101 that detects a preamble by using 1st and 2nd clocks with the same period but with different phases, a clock generating section 104 that generates a reception clock on the basis of a data change point pulse signal from a Manchester code signal data change point detection circuit 102 and a count of an N-notation counter 103 and a flip-flop 105 that samples a Manchester code signal by using the reception clock to convert the sampled signal into an NRZ code signal. Thus, the Manchester code receiver can be obtained, which can surely convert the Manchester code signal into the NRZ code signal while extracting the synchronization clock independently of the operating frequency.
More Like This:
JPS61230524 | CODE CONVERTING CIRCUIT |
Inventors:
Takuya Kobayashi
Application Number:
JP13530799A
Publication Date:
July 07, 2003
Filing Date:
May 17, 1999
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H03M5/12; H04L7/027; H04L25/38; H04L25/49; (IPC1-7): H04L25/38; H04L7/027; H04L25/49
Domestic Patent References:
JP5122203A | ||||
JP583140A | ||||
JP918345A | ||||
JP722954A |
Attorney, Agent or Firm:
Fumio Iwahashi (2 others)
Previous Patent: PRINTING DEVICE, AND PHOTOGRAPHIC PROCESSOR EQUIPPED WITH THE SAME
Next Patent: PHASE WARRANT CIRCUIT
Next Patent: PHASE WARRANT CIRCUIT