Title:
材料試験機
Document Type and Number:
Japanese Patent JP6780522
Kind Code:
B2
Abstract:
In order to provide a material tester having a digital noise removal filter capable of high-accuracy filtering without generating an error caused by a rounding calculation using a simple configuration even when an integrated value obtained by inputting an averaged differential signal to an integrator (28) is displayed on a display unit (24), a filter circuit (60) is provided in which - "n" data delay elements (D1 ... Dn) are cascaded to sequentially accumulate input data from a sensor (40),- an adder (ADD) is configured to obtain a total sum of data output from each of the "n" delay elements, and- a divider (DIV) is configured tooutput a quotient obtained by dividing an output of the adder by the number "n" of the delay elements as averaged data andoutput a remainder to a remainder delay element (Dre).In each calculation, data output from each of the "n" delay elements and the remainder value output from the divider in the previous calculation are input to the adder, and an addition process for obtaining a total sum thereof is executed.
Inventors:
Hiroshi Tsuji
Application Number:
JP2017015061A
Publication Date:
November 04, 2020
Filing Date:
January 31, 2017
Export Citation:
Assignee:
SHIMADZU CORPORATION
International Classes:
H03H17/02; H03H17/08
Domestic Patent References:
| JP2011044772A | ||||
| JP6230938A | ||||
| JP4227535A | ||||
| JP2274010A | ||||
| JP5216629A | ||||
| JP2001067219A |
Foreign References:
| US5304908 |
Attorney, Agent or Firm:
Kyoto International Patent Office
Takashi Otsubo
Takashi Otsubo