PURPOSE: To reduce a propagation delay and to reduce the number of the input and the output pin of a package by providing a memory having the same constitution on a TLB and a BAA.

CONSTITUTION: Memory parts 20-1W4 input an address signal 25, a data-in signal 26 and a write approval signal 27 as a common signal with chip select signals 24-1W4, and output data-out signals 33-1W4. An output data selecting circuit 23 outputs to an output pin 32 one group of data selected by the chip select signals 24-1W4 among the data-out signals 33-1W4. Comparing circuits A21-1W4 compare the data-out signals 33-1W4 read out of the memory parts 20-1W4 with a signal to be compared 29 from the outside, comparing circuits B22-1W4 compare the data-out signals 33-1W4 read out of the memory parts 20-1W4 with a signal to be compared 28 from the outside, and when the dissidence of two inputs is detected, "1" is outputted to comparison detecting outputs A30-1W4 and comparison detecting outputs B31-1W4, respectively.