Title:
マルチコアプロセッサシステム、およびスケジューリング方法
Document Type and Number:
Japanese Patent JP5725040
Kind Code:
B2
Abstract:
A multi-core processor system includes plural processors; and a scheduler that assigns applications to the processors. The scheduler upon receiving a startup request for a given application and based on start times of the applications executed by the processors, selects a processor that is to execute the given application.
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Inventors:
Yasushi Kurihara
Koichiro Yamashita
Takahisa Suzuki
Hiromasa Yamauchi
Toshiya Otomo
Otachi Naoki
Koichiro Yamashita
Takahisa Suzuki
Hiromasa Yamauchi
Toshiya Otomo
Otachi Naoki
Application Number:
JP2012552582A
Publication Date:
May 27, 2015
Filing Date:
January 13, 2011
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F9/50
Domestic Patent References:
JP2008140120A | 2008-06-19 |
Foreign References:
CH283612A | 1952-06-15 | |||
FR1392029A | 1965-03-12 | |||
FR2166276A1 | 1973-08-17 | |||
GB533718A | 1941-02-19 | |||
US2151733A | 1939-03-28 |
Attorney, Agent or Firm:
Akinori Sakai