PURPOSE: To provide a ROM internal circuit capable of easily increasing the number of terminals to be used for outputting data from a ROM without increasing the number of terminals in a conventional ROM package in respect to data width longer than the bit width of a data bus for a ROM.
CONSTITUTION: The ROM internal circuit constituted of an address input terminal means 101, decoder means 102, 103, a memory cell array 104, an output buffer means 106, and a data output terminal means 107 has an address latch means 115 for latching an inputted address and transmitting the latched address to the means 102, 103, an address/data multiplex bus bidirectonal buffer means 114 for transmitting an address from the means 101 to the means 115 at the time of inputting the address and transmitting a prescribed bit in data to the means 101 at the time of outputting the data and a bus for connecting the means 106 to the means 114.
JPS6444588A | 1989-02-16 | |||
JPS5915687A | 1984-01-26 |
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