PURPOSE: To obtain a multiplying circuit which can execute an operation at a high speed by lowering the arithmetic strength.

CONSTITUTION: Registers 2e, 2f, 2d, 2g and 2h for storing a multiplier PB, a multiplicand PA and an arithmetic result PP in the past and a difference βbetween the present multiplier B and the multiplier PB in the past, and a difference α between the present multiplicand A and the multiplicand PA in the past are provided in a storage means 2, a multi-input adding means 7 which can execute multiplication of about two folds and three folds by replacing it with addition is provided, and by utilizing the arithmetic result PP in the past and replacing the multiplication with addition and subtraction of plural times, a calculation is executed.