Title:
MULTIPROCESSOR DEVICE
Document Type and Number:
Japanese Patent JPS61272861
Kind Code:
A
Abstract:
PURPOSE:To attain a direct access in the same manner as in the single processor constitution by giving the right of using a subsystem bus to a main processor and mapping all address spaces of memory to be connected to the main proces sor in its address space. CONSTITUTION:When a straight line AB connecting a point A to a point B is plotted on the screen of a CRT 1, the main processor 1 writes data on points A and B in a shared memory 12, and a subprocessor 6 reads said data out of the shared memory 12, caldculates a dot line connecting points A and B, and writes it in a video memory 10. When the hard copy of the CRT 11 is obtained and printed on a printer 5, first the main processor 1 takes the right of using the subsystem bus SB2 by a bus using right control circuit 14, sets the subprocessor 6 in the held state, and transfers the contents of the video memory 10 to the printer 5 and a printer interface 4.
Inventors:
HIRAHISA HIROICHI
Application Number:
JP11487885A
Publication Date:
December 03, 1986
Filing Date:
May 28, 1985
Export Citation:
Assignee:
YOKOGAWA ELECTRIC CORP
International Classes:
G06F15/16; G06F12/06; G06F13/18; G06F15/177; G06T1/00; (IPC1-7): G06F13/18; G06F15/16; G06F15/62
Domestic Patent References:
| JPS58195265A | 1983-11-14 | |||
| JPS58201166A | 1983-11-22 | |||
| JPS6022264A | 1985-02-04 |
Attorney, Agent or Firm:
Shinsuke Ozawa
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