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Patent Searching and Data


Title:
OUTPUT LIMITING CIRCUIT
Document Type and Number:
Japanese Patent JPS5839104
Kind Code:
A
Abstract:

PURPOSE: To make the operating point optimum and to reduce the distortion, by providing resistances between the emitter and the collector of an output transistor to obtain a feedback signal to the input side and providing a resistance circuit between a load and resistances for division.

CONSTITUTION: The collector of a transistor TR3 is connected to a load 10 through a vairable resistance 9 for output limitation, and resistances 12 and 13 for division are provided between the emitter and the collector of the TR3 to obtain a feedback signal to the input side, and a resistance 14 is provided between the load and resistances 12 and 13, thus constituting an output limiting circuit. When the value of the resistance 9 is made large when a load current 11 is sufficiently larger than the current flowed to resistances 12, 13, and 14, the current 11 is reduced to increase the collector voltage of the TR3, and the operating point for output limitation is kept in the center of an AC load line, and thus, an optimum amplification of less distortion is possible.


Inventors:
NAKAZAWA HAJIME
Application Number:
JP13687581A
Publication Date:
March 07, 1983
Filing Date:
August 31, 1981
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03F1/32; H03G11/00; (IPC1-7): H03F1/32; H03G11/00
Attorney, Agent or Firm:
Toshio Nakao