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Patent Searching and Data


Title:
PARALLEL SYSTEM MANUFACTURING METHOD OF PRINTED CIRCUIT BOARD
Document Type and Number:
Japanese Patent JP2006049793
Kind Code:
A
Abstract:

To provide a parallel system manufacturing method of a printed circuit board which reduces process cost, shortens manufacturing time, and reduces the failure of a final product.

The method comprises processes of: forming a first circuit layer in which a via-hole for electrically conducting front/rear sides and a circuit pattern are formed; applying an insulating material for insulating with other circuit layer in a whole surface of the first circuit layer; forming a second circuit layer in which a via-hole for electrically conducting front/rear sides and a circuit pattern are formed; preliminarily laminating the second circuit layer at an insulating material applying side of the first circuit layer; and crimping the first and the second circuit layers.


Inventors:
MOK JEE-SOO
SUN BYUNG-KOOK
SONG CHANG-KYU
PARK JUN-HEYOUNG
MAENG DUCK-YOUNG
KIM TAE-HOON
Application Number:
JP2004289952A
Publication Date:
February 16, 2006
Filing Date:
October 01, 2004
Export Citation:
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Assignee:
SAMSUNG ELECTRO MECH
International Classes:
H05K3/46
Attorney, Agent or Firm:
Sota Asahina
Fumio Akiyama