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Title:
POLISHING SYSTEM FOR SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JP3894514
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To eliminate dirts between a chuck table and a wafer for preventing, at polishing, crack or dimple of the wafer, by polishing the surface of wafer placed on the upper surface of chuck table after washing the wafer surface contacting to a washed upper surface of the chuck table.
SOLUTION: A chuck table 14 which held a wafer W is contaminated at its upper surface with chip, etc., so the upper surface is washed by a washing means 12 at polishing. The wafer W is sucked by a transportation means 8, and is rotated while a washing member 19b on a rotating disk 10a contacts to the wafer W, and the lower surface of the wafer W is washed under water jet from a nozzle. After that, the wafer W is transported onto the chuck table 14, and is sucked and held by the chuck table 14. Then, a turn table 13 is so rotated that the chuck table 14 is positioned directly under a polisher 15, and a polishing grindstone 15b of the polisher 15 is rotated so that the upper surface of wafer W is polished while a polishing liquid is supplied.


Inventors:
Yutaka Koma
Yoshizo Sato
Masatoshi Nanjo
Application Number:
JP8676997A
Publication Date:
March 22, 2007
Filing Date:
April 04, 1997
Export Citation:
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Assignee:
Disco Co., Ltd.
International Classes:
H01L21/304; B24B37/04; B24B37/30; (IPC1-7): H01L21/304; B24B37/04
Domestic Patent References:
JP6275582A
JP58223561A
JP6005568A
JP8126956A
JP1169026U
JP6124930A
JP8153693A
JP7130692A
JP57132965A
JP6177096A
JP61166133A
Attorney, Agent or Firm:
Teruo Akimoto