PURPOSE: To obtain a frequency divided pulse of high frequency precision by constituting a programmable counter for minute frequency change of at least two programmable counters.

CONSTITUTION: A programmable counter SC for minute frequency change consists of a programmable counter SC1 which takes a prime oscillation clock pulse P1 as the direct input to output a frequency divided pulse P1 of a set value N1 and a programmable counter SC2 which takes a clock pulse PC1 outputted from an AND gate A2 as the input to output a frequency divided pulse P2 of a set value N2 and the frequency divided pulse P2 is outputted from the counter SC2 as the output of the counter SC. A clock pulse PC2 is inputted to a programmable counter L for large frequency change through an AND gate A1 to output an output pulse P0. When the frequency of the pulse P0 is divided by 1/N(N.n), the counter SC performs frequency division of the decimal part (n), and the counter L performs frequency division of the integer part N. Thus, the frequency division precision is improved.