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Title:
NON-VOLATILE SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JP3113520
Kind Code:
B2
Abstract:

PURPOSE: To unnecessitate switching and applying plural kinds of power source voltage to a word line 5, and to have only to compare voltage of a bit line 3 with one kind of reference voltage Vref.
CONSTITUTION: An I-V characteristic is varied by varying threshold voltage Vth and the like of a cell transistor 2 to voltage of three kinds or more and multi-value data is stored, and a time is measured by a counter 10 until voltage of the bit line 3 becomes lower than the reference voltage Vref after this cell transistor is conducted. Thereby, a difference between these I-V characteristics is detected, and multi-value data is read out.


Inventors:
Nobuhiko Ito
Application Number:
JP26262894A
Publication Date:
December 04, 2000
Filing Date:
October 26, 1994
Export Citation:
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Assignee:
Sharp Corporation
International Classes:
G11C16/04; G11C16/02; G11C17/00; (IPC1-7): G11C16/04; G11C16/02
Domestic Patent References:
JP58137181A
JP56153582A
JP57120299A
Attorney, Agent or Firm:
Shusaku Yamamoto



 
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