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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2013243289
Kind Code:
A
Abstract:

To provide a semiconductor device manufacturing method which prevents a short circuit between a control gate electrode and a memory gate electrode.

A semiconductor device manufacturing method comprises: performing an etching treatment by using a photoresist pattern as a mask, which covers a part of a silicon nitride film, covering a top face of a control gate, that extends to one side from an intermediate position in a gate length direction, and which exposes a part that extends to another side opposite to the one side form the intermediate position in the gate length direction to leave the part that extends to the one side and remove the part that extends to the other side thereby to expose the top face of the control gate electrode; and forming a cobalt silicide film on the exposed top face of the control gate electrode and on a surface of a memory gate electrode.


Inventors:
KINUGASA HIROAKI
Application Number:
JP2012116526A
Publication Date:
December 05, 2013
Filing Date:
May 22, 2012
Export Citation:
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Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H01L21/336; H01L21/8247; H01L27/115; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Fukami patent office