Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH01155662
Kind Code:
A
Abstract:
PURPOSE:To use a p-n junction between a drain region and an opposite conductivity type impurity region as a zener diode by a method wherein an impurity region reverse in conductivity type to a drain is built in a region adjacent to a MOS transistor drain region. CONSTITUTION:On a p-type silicon (100) substrate 8, an n-type epitaxial layer is grown. A p<+>-type diffusion layer 9 is formed, dividing the n-type epitaxial layer into n-type islands 10. A p<-> well region 11 is formed, and then a CMOS transistor section, a gate insulating film 12, and a gate electrode 13 are formed simultaneously. A p-type impurity is diffused for the formation of a substrate contact diffusion region 14 and a diffusion region 15. Next, an n-type impurity is diffused for the formation of an anode (source) region 16 and a cathode (drain) region 17. Finally, an insulating film 18 is formed to cover the whole surface of the substrate 8, electrode leadout openings are provided, and a cathode electrode 19 and an anode electrode 20 are formed.
Inventors:
OTOWA YUTAKA
KAWANO KENZO
KO KOICHIRO
KIDA YOSHIHIRO
KAWANO KENZO
KO KOICHIRO
KIDA YOSHIHIRO
Application Number:
JP31495287A
Publication Date:
June 19, 1989
Filing Date:
December 11, 1987
Export Citation:
Assignee:
SHARP KK
International Classes:
H01L29/78; H01L21/8234; H01L27/06; H01L29/866; (IPC1-7): H01L27/06; H01L29/78; H01L29/90
Attorney, Agent or Firm:
Takeshi Sugiyama (1 outside)