Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6387770
Kind Code:
A
Abstract:

PURPOSE: To reduce the ON-state resistance and the spreading of two dimensional direction by forming a semiconductor layer as well as an electrode layer as semiconductor active elements on a thin band, thereby extending the above layers in the longitudinal direction and also, thereby winding the thin band into a spiral form in the length direction, while external terminals are mounted so that they can be extended in the cross direction of the thin band.

CONSTITUTION: This device comprises a thin band 1, a first semiconductor layer 3, a second semiconductor layer 4, a third semiconductor layer 5, control electrodes 6 and external terminals 11∼13: while the thin band 1 has a prescribed width and length as well as a inflec tion property that is wound into a spiral form in the length direction inside out; the first semiconductor layer 3 that is formed on the surface of thin band by extending in the length direction as well as the second semiconductor layer 4 that is isolated from the layer 3 and in parallel with the layer 3 in reality; the third semiconductor layer 5 that comes in contact with the surfaces of semiconductor layers 3 and 4 and also fills the gap between the above two layers; the control electrode layers 6 that connect to the third layer 5; a plurality of the external terminals 11∼13 that extend in the cross direction of the thin band 1 connected to the first and second layers 3 and 4 as well as the control electrodes 6. Accordingly elements having the spreading of two dimensional direction comes to a cylindrical form and reduces dimensions on the substrate to be used exclusively when they are mounted on a print substrate and the like. Thus, such an arrangement helps reduced the ON-state resistance and the spread ing of two dimensional direction.


Inventors:
NAKANE TAKESHI
Application Number:
JP23306886A
Publication Date:
April 19, 1988
Filing Date:
September 30, 1986
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
AISIN SEIKI
International Classes:
H01L29/861; H01L21/338; H01L25/00; H01L29/78; H01L29/786; H01L29/80; H01L29/812; (IPC1-7): H01L25/00; H01L29/78; H01L29/80
Attorney, Agent or Firm:
Nobuoki Sugi



 
Previous Patent: 施封装置

Next Patent: FIELD EFFECT TRANSISTOR