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Title:
SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP2012195519
Kind Code:
A
Abstract:

To simply provide a termination structure (junction termination structure) which does not significantly affect the reverse breakdown voltage of an SiC semiconductor device, even if the process conditions vary in the impurity addition process or the passivation film formation process.

The SiC semiconductor element has a junction termination structure consisting of a first conductivity type breakdown voltage sustention layer and a region of second conductivity type different from the first conductivity type having an infinite length, in the outer peripheral end of the element. The junction termination structure is formed so that the impurity concentration of the first conductivity type region is not uniform in the first direction, i.e. the layer direction, in a part of the junction termination structure but is modulated spatially from the outer peripheral end of the element as the inside end of the junction termination structure toward the outside end of the junction termination structure to decrease gradually.


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Inventors:
KIMOTO TSUNENOBU
SUDA ATSUSHI
FENG GAN
Application Number:
JP2011059992A
Publication Date:
October 11, 2012
Filing Date:
March 18, 2011
Export Citation:
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Assignee:
UNIV KYOTO
International Classes:
H01L29/868; H01L21/329; H01L29/06; H01L29/12; H01L29/47; H01L29/78; H01L29/861; H01L29/872
Domestic Patent References:
JP2000516767A2000-12-12
JP2008010506A2008-01-17
JP2008034646A2008-02-14
JP2003101039A2003-04-04
JP2009277806A2009-11-26
JPS61248555A1986-11-05
JPS59110164A1984-06-26
JP2007165604A2007-06-28
Foreign References:
WO2012049872A12012-04-19
WO2010132144A12010-11-18
Attorney, Agent or Firm:
今村 健一
平木 祐輔
渡辺 敏章



 
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