Title:
SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT, COMPUTER SYSTEM, AND METHOD OF CONTROLLING SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP2014222425
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of normally resuming system operation even when the system is unexpectedly brought into a state in which power supply is stopped.SOLUTION: A semiconductor integrated circuit includes: at least one nonvolatile register that includes a holding circuit for holding volatile data and a nonvolatile element for holding nonvolatile data; a nonvolatile memory that, for a match or mismatch between the volatile data and nonvolatile data within the nonvolatile register, holds a first value if there is the match and holds a second value if there is the mismatch; a monitoring circuit that monitors a match/mismatch state within the nonvolatile register of the nonvolatile memory and outputs a signal according to the state of the nonvolatile memory; and a node that outputs the signal from the monitoring circuit to an internal arithmetic unit or external device. In the startup operation of a power supply, if the nonvolatile memory holds the second value, the monitoring circuit supplies an active signal to the node.
Inventors:
TSUJI YUKIHIDE
SAKIMURA NOBORU
NEHASHI RYUSUKE
TADA AYUKA
SAKIMURA NOBORU
NEHASHI RYUSUKE
TADA AYUKA
Application Number:
JP2013101822A
Publication Date:
November 27, 2014
Filing Date:
May 14, 2013
Export Citation:
Assignee:
NEC CORP
International Classes:
G06F1/30; G06F1/32; H01L21/822; H01L21/8246; H01L27/04; H01L27/105; H01L43/08; H01L45/00; H03K3/037; H03K3/356
Attorney, Agent or Firm:
Desk Masahiko
Naoki Shimosaka
Naoki Shimosaka
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