PURPOSE: To reduce the number of pins which are unnecessary in an actual operation mode by providing a semiconductor integrated circuit with a power supply/test pin to which a test signal is inputted or from which a test signal is outputted while it remains unconnected to a power supply pin or a ground pin.

CONSTITUTION: In an operation mode, a predetermined electric potential is applied to a power supply/test pin 16 in parallel with a power supply pin 14 or a ground pin, whilst, in a test mode, a test signal is inputted to or outputted from the power supply/test pin 16 while it is separated from the power supply pin or the ground pin. A semiconductor integrated circuit is provided with such a power supply/test pin 16. A test signal TIN inputted from the power supply/test pin 16 is introduced into an internal circuit via a gate circuit 26, and a predetermined test is carried out. Thereby, the power supply pin 14 in a normal operation mode is used as a test signal input pin in a test mode, and hence the number of pins is reduced.