SEMICONDUCTOR MEMORY DEVICE

Title:

SEMICONDUCTOR MEMORY DEVICE

Document Type and Number:

Japanese Patent JP2003109390

Kind Code:

A

Abstract:

To provide a semiconductor memory device in which memory sense operation is stabilized, power consumption is reduced, and a leak test time can be reduced.

A flash memory 10 is provided with a memory cell array AR RAY, a read-out control circuit CONTROL 1 generating a pre-charge signal for pre-charging bit lines, a sense amplifier S/A amplifying data read out from a selection memory cell MC, and a sense amplifier control circuit SENGEN generating a sense amplifier enable-signal SENSEN enabling a sense amplifier based on a pre-charge signal, the sense amplifier S/A is made an enable-state when a sense amplifier enable-signal SENSEN is asserted, while input of read- out data of the memory cell MC is prohibited.

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Inventors:

OIKAWA KIYOHARU
MARUYAMA KIMIO
WATANABE YASUHIRO
KUZUNO NAOKAZU

Application Number:

JP2001298506A

Publication Date:

April 11, 2003

Filing Date:

September 27, 2001

Export Citation:

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Assignee:

TOSHIBA CORP
TOSHIBA LSI SYSTEM SUPPORT KK

International Classes:

G11C7/06; G11C11/401; G11C11/409; G11C16/02; G11C16/06; G11C16/28; G11C29/02; G01R31/28; G11C29/04; (IPC1-7): G11C16/06; G01R31/28; G11C11/401; G11C11/409; G11C16/02; G11C29/00

Attorney, Agent or Firm:

Takehiko Suzue (6 outside)

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