Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP2016152052
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor memory device that can improve operation reliability.SOLUTION: A semiconductor memory device of an embodiment includes: first and second memory cells; a first word line connected to gates of the first and second memory cells; a first bit line electrically connected to one end of the first memory cell; and a second bit line electrically connected to one end of the second memory cell. A write operation includes a plurality of loops, which include: a first operation for applying a write voltage; a second operation for applying a first voltage lower than the write voltage; and a third operation for applying a verify voltage. When, in the third operation, a threshold voltage of the first memory cell is lower than a first threshold and a threshold voltage of the second memory cell is equal to or higher than the first threshold, a second voltage is applied to the first bit line and a third voltage lower than the second voltage is applied to the second bit line in the second operation.SELECTED DRAWING: Figure 5
Inventors:
HOSONO KOJI
Application Number:
JP2015029644A
Publication Date:
August 22, 2016
Filing Date:
February 18, 2015
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
G11C16/02; G11C16/06
Attorney, Agent or Firm:
Kurata Masatoshi
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Katsu Sunagawa
Tadashi Inoue
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Katsu Sunagawa
Tadashi Inoue
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
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