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Patent Searching and Data


Title:
SEMICONDUCTOR METHOD AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JPH06283533
Kind Code:
A
Abstract:

PURPOSE: To provide a semiconductor device and manufacturing method thereof hardly making an upper conductor layer rough when this layer is formed on an insulating layer.

CONSTITUTION: This semiconductor device is provided with a lower conductor layer 12, an insulating layer, an upper conductor layer 26 and a connecting hole 28 for electrically connecting said lower and upper conductor layers 12 and 26 formed on a base substance 10 while the insulating layer is formed of the first insulating material layer 14a containing impurites and the seond insulating material layer 14b not containing the impurities at all. On the other hand, this manufacturing method of this semiconductor device is composed of the following three steps i.e., the first step (A) of forming the first insulating material layer 14a containing the impurities on the base substance 10 whereon the lower conductor layer 12 is formed and then to form an aperture part 28 in the first insulating material layer 14a, the second step (B) of forming the second insulating material layer 14B not comtaining the impurities on the first insulating material layer 14A excluding the bottom part of the aperture part 28 and the third step (C) of forming a connecting hole 28 by burying a barrier metal material and a metallic wiring material in the a perture part 28 simultaneeously forming the upper conductor layer 26 comprising the barrier metal material and the metallic wiring material on the second insulating material layer 14b.


Inventors:
OKAMOTO YUTAKA
Application Number:
JP9379293A
Publication Date:
October 07, 1994
Filing Date:
March 30, 1993
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L21/28; H01L21/3205; H01L21/768; H01L23/52; (IPC1-7): H01L21/3205; H01L21/28; H01L21/90
Attorney, Agent or Firm:
Takahisa Yamamoto