Title:
半導体不揮発性記憶装置
Document Type and Number:
Japanese Patent JP5511489
Kind Code:
B2
Abstract:
In a semiconductor nonvolatile memory device, nonvolatile memory cells are plurally arranged in a memory array portion. An output circuit outputs setting information selected from plural sets of setting information to generate reference currents with different current values. A reference current circuit generates a reference current with a current value according to the setting information outputted from the output circuit. An amplifier circuit compares a cell current outputted from a selected memory cell of the memory array portion with the reference current generated by the reference current circuit.
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Inventors:
Hiroyuki Tanikawa
Application Number:
JP2010102106A
Publication Date:
June 04, 2014
Filing Date:
April 27, 2010
Export Citation:
Assignee:
LAPIS Semiconductor Co., Ltd.
International Classes:
G11C16/06; G11C16/02; G11C16/04; H01L21/8247; H01L27/115
Domestic Patent References:
| JP2010009728A | ||||
| JP2006252670A | ||||
| JP2008047209A | ||||
| JP2004055081A | ||||
| JP2008084453A | ||||
| JP11126489A | ||||
| JP2003233999A | ||||
| JP2007193933A |
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori
Hiroshi Fukuda
Kato Kazunori
Hiroshi Fukuda