To provide a semiconductor package which can be downsized and improved in durability against mechanical load, and to provide a manufacturing method thereof.
The semiconductor package 1 is obtained in such a way that a large number of semiconductor chips are mounted on a substrate having a repeatedly formed electrode pattern forming a single unit of semiconductor package and the whole surface of the mounting substrate including a group of the semiconductor chips is sealed with resin and the substrate is divided into individual semiconductor packages, wherein an adhesive layer 5 is formed and interposed between the resin contact surface side of an electrode 31 exposed on a divided end surface and the sealing resin 6. The manufacturing method of the semiconductor package 1 includes: forming the adhesive layer on the resin contact surface of the electrode pattern exposed on the divided end surface after the semiconductor chip 4 is mounted on the substrate 2, sealing the whole surface of the substrate mounting surface including the group of the semiconductor chips with resin, and dividing the substrate into individual semiconductor packages after the sealing resin 6 is cured.
KIMURA KIMIHIKO
JP2002016193A | 2002-01-18 | |||
JP2005019935A | 2005-01-20 | |||
JP2002151805A | 2002-05-24 |
Next Patent: SOLID IMAGING APPARATUS, AND METHOD FOR MANUFACTURING THE SAME