SILICON WAFER AND METHOD FOR MANUFACTURING THE SAME

Japanese Patent JP2015088698

A

PROBLEM TO BE SOLVED: To provide a silicon wafer used as a substrate for semiconductor device production, which is arranged so that even with an element slow in diffusion, an impurity density of a surface layer can be reduced sufficiently by rapidly moving impurities from a device region of the surface layer to a gettering layer.SOLUTION: A silicon wafer 1 used as a substrate for semiconductor device production has a double layer structure, which comprises a monocrystalline silicon layer 11, and a polycrystalline silicon layer 12 joined to the whole backside of the monocrystalline silicon layer 11. The monocrystalline silicon layer 11 is a layer for device production from which a semiconductor device is produced, which has a thickness enough to produce a semiconductor device, specifically a thickness equal to or less than 100 μm (e.g. 10 μm). The polycrystalline silicon layer 12 serves as an impurity gettering layer for gettering contaminant impurities such as heavy metal impurities (Mo, W, Fe, etc.) included in the monocrystalline silicon layer 11. The polycrystalline silicon layer 12 is arranged to be remarkably thicker than the monocrystalline silicon layer 11. Specifically, the polycrystalline silicon layer 12 has a thickness of 100 μm or more.

TOBE TOSHIMI

JP2013228432A

May 07, 2015

November 01, 2013

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SHINETSU HANDOTAI KK

H01L21/322; H01L21/02

JPH1126469A	1999-01-29
JPH04273128A	1992-09-29
JP2000036584A	2000-02-02
JPH05206146A	1993-08-13
JPH0745800A	1995-02-14
JP2010062414A	2010-03-18

Ryuji Harikawa

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