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Title:
SWITCHING CIRCUIT
Document Type and Number:
Japanese Patent JPH02272908
Kind Code:
A
Abstract:

PURPOSE: To enable high-speed operation with low energy consumption by driving a P channel power MOS transistor by a buffer and stabilizing the power source voltage of the buffer by a constant voltage circuit.

CONSTITUTION: A control signal to be inputted from a control terminal 4 is inputted to an inverter 11, which is a CMOS buffer, and the output of the inverter 11 is supplied to the gate of a P channel MOSFET 3. The power source voltage of the inverter 11 is determined by the constant voltage circuit, which is composed of a Zener diode 12 and resistor 13, and even when the power source voltage of a switching circuit (the voltage of a terminal 1) is fluctuated, the power source voltage of the inverter 11 is not fluctuated. Accordingly, a drive voltage is not fluctuated as well and the power MOSFET 3 can be always stably driven. Then, a switching speed is determined by the speed of the inverter 11. Thus, operation can correspond to the high speed with the low energy consumption.


Inventors:
AZUMA KEIICHIRO
HIRANO YOSHIFUMI
Application Number:
JP9467689A
Publication Date:
November 07, 1990
Filing Date:
April 14, 1989
Export Citation:
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Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
H03K17/04; H03K17/687; (IPC1-7): H03K17/04; H03K17/687
Domestic Patent References:
JP62119027B
Attorney, Agent or Firm:
Masanori Fujimaki



 
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