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Title:
THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP2005123620
Kind Code:
A
Abstract:

To homogenize the parasitic capacitance between a gate electrode and a drain electrode.

A gate line having a gate electrode 124 is formed on a substrate, and a gate insulating film covering the gate line is laminated thereon. Next, a semiconductor layer 151 is formed on the gate insulating film, a data line 171 having a source electrode 173 making contact with the semiconductor layer, and a drain electrode 175 overlapping with the gate electrode 124, are formed; a protective film covering the semiconductor layer is formed; and a pixel electrode connected with the drain electrode is formed. In this case, the semiconductor layer, the data line and the drain electrode or the pixel electrode are patterned using a photosensitive film pattern obtained by exposing and developing a photosensitive film in the exposure process of a photoetching step as a mask, and a boundary line of the gate electrode overlapping with the drain electrode is arranged to be perpendicular to the scanning direction of exposure for the photosensitive film in the exposure process.


Inventors:
DEN SHOEKI
LEE SEIEI
CHOI KWON-YOUNG
ZEN SAIKO
Application Number:
JP2004298534A
Publication Date:
May 12, 2005
Filing Date:
October 13, 2004
Export Citation:
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Assignee:
SAMSUNG ELECTRONICS CO LTD
International Classes:
G02F1/1368; G02F1/136; G09F9/30; H01L21/336; H01L21/77; H01L21/84; H01L27/12; H01L29/417; H01L29/786; (IPC1-7): H01L21/336; G02F1/1368; G09F9/30; H01L29/786
Domestic Patent References:
JP2003121866A2003-04-23
JP2002190605A2002-07-05
Attorney, Agent or Firm:
Kazuo Shamoto
Tadashi Masui
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
Otsuka Sumie