Title:
TIME MEASURING SYSTEM AND CLOCK
Document Type and Number:
Japanese Patent JP3383437
Kind Code:
B2
Abstract:
PURPOSE: To enhance accuracy in the measurement of time by opening a gate at a timing common to a plurality of power supply frequencies and counting only one wave number thereby preventing miss counting due to noise.
CONSTITUTION: The power supply frequency waveform of 50/60Hz from an AC power supply A is shaped through a shaper circuit 1 and fed to one input terminal (a) of an AND gate 2 having the other input terminal 2b being fed with a control signal for opening the gate 2 for a predetermined time from a control circuit 4. Output from the AND gate 2 is counted by a counter circuit 3 and presented on a display 8. The control circuit 4 includes a memory 5 which stores a count for presetting a predetermined delay value, e.g. a gate release time 16.67ms or a measurement disable delay 83.33ms, and the count thus stored is fed through a counter 6 to the input terminal 2b of the gate 2. The counter 6 receives a clock from a quartz oscillator in an oscillation circuit 7 and loads the clock through the control circuit 4 to the input terminal 2b of the gate. This constitution can correct the time measured upon instantaneous power interruption at the cost of accuracy.
Inventors:
Kenji Kobayashi
Application Number:
JP25947494A
Publication Date:
March 04, 2003
Filing Date:
September 29, 1994
Export Citation:
Assignee:
Denon Co., Ltd.
International Classes:
G04G3/02; G04G3/00; (IPC1-7): G04G3/00
Domestic Patent References:
| JP6118184A | ||||
| JP4839072A | ||||
| JP58136141A |
Attorney, Agent or Firm:
Minoru Hayashi