PURPOSE: To easily obtain a memory having a high speed and low power consumption by forming an intermediate superconductor on a board, providing split electrode superconductors thereon, and forming a ferroelectric element and a control electrode between both electrode superconductors.
CONSTITUTION: This memory comprises a base layer 2, an intermediate superconductor 3 sequentially formed on a board 1, and split electrode superconductors 4 provided on the superconductor 3. The memory further comprises a ferroelectric element 5 between the superconductors 4 and 4, and a control electrode 6 formed on the element 5. In this case, a critical temperature Tc1 of the superconductor 4 and a critical temperature Tc2 of the superconductor 3 for connecting between the electrodes satisfy the relationship of Tc1>Tc2, and carrier density n1 of the superconductor 4 and carrier density n2 of the superconductor 3 satisfy the relationship of n1>n2. Bistable electric polarization is generated at the element 5 by a control signal to control conductivity of the superconductor.
KAMIKAWA TAKETOMI
IWASHITA SETSUYA
SHIMODA TATSUYA
