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Patent Searching and Data


Title:
MANUFACTURE OF THIN FILM TRANSISTOR
Document Type and Number:
Japanese Patent JPH0677249
Kind Code:
A
Abstract:

PURPOSE: To provide a method of manufacturing a coplanar TFT, which does not inflict damage on the surface of a semiconductor film, lessens the overlap capacity of a gate electrode with an ohmic layer and makes possible an increase in the areas of thin films.

CONSTITUTION: A semiconductor film pattern 52 is formed on a substrate 50 and after the whole substrate surface including this pattern 52 is covered in order with a thin film 54 for gate insulating. film formation use and a thin film 56 for gate electrode formation use, two pieces of windows 59 for exposing scheduled ohmic layer formation regions 60 in the pattern 52 are formed in these thin films. Subsequently, a prescribed impurity is introduced in the regions 60 via the two pieces of the windows 59 by plasma doping. Then, the film 56 is partially removed to form a thin film 62 for gate electrode use in such a way as to remain.


Inventors:
MORI MIKIO
KAKINUMA HIROAKI
Application Number:
JP22627892A
Publication Date:
March 18, 1994
Filing Date:
August 25, 1992
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
G02F1/136; G02F1/1368; H01L21/265; H01L21/336; H01L29/78; H01L29/786; (IPC1-7): H01L21/336; G02F1/136; H01L21/265; H01L29/784
Attorney, Agent or Firm:
Takashi Ogaki