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Title:
ANALOG SWITCH CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS6037819
Kind Code:
A
Abstract:

PURPOSE: To attain high accuracy by switching a compensation MOS size in accordance with the variation in process constant in an analog switch circuit device comprising an MOS analog switch and a capacitor.

CONSTITUTION: A compensating means 114 is provided between an inverter 1 and a capacitor C1 in the analog switch circuit device, e.g., a comparator comprising MOS analog switches NM1, NM2, PM1, PM2, capacitors C1, C2 and inverters 1∼3 acting as amplifiers. The compensating means 114 cancels an error charge of the capacitor C1 due to charge transfer at ON/OFF switching of the analog switches NMi and PMi and includes plural MOS transistors NM10∼13. Further, an MOS transistor having the most excellent cancellation effect is selected by a selection signal from a decoder 104.


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Inventors:
KUBOKI SHIGEO
Application Number:
JP14694983A
Publication Date:
February 27, 1985
Filing Date:
August 10, 1983
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03K17/693; H03K17/14; (IPC1-7): H03K17/687
Domestic Patent References:
JPS5899033A1983-06-13
Attorney, Agent or Firm:
Katsuo Ogawa (2 outside)



 
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