PURPOSE: To attain high accuracy by switching a compensation MOS size in accordance with the variation in process constant in an analog switch circuit device comprising an MOS analog switch and a capacitor.
CONSTITUTION: A compensating means 114 is provided between an inverter 1 and a capacitor C1 in the analog switch circuit device, e.g., a comparator comprising MOS analog switches NM1, NM2, PM1, PM2, capacitors C1, C2 and inverters 1∼3 acting as amplifiers. The compensating means 114 cancels an error charge of the capacitor C1 due to charge transfer at ON/OFF switching of the analog switches NMi and PMi and includes plural MOS transistors NM10∼13. Further, an MOS transistor having the most excellent cancellation effect is selected by a selection signal from a decoder 104.
JP4552803 | Semiconductor integrated circuit |
JP2004104394 | HIGH FREQUENCY SWITCH |
JPS5899033A | 1983-06-13 |