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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS58169964
Kind Code:
A
Abstract:

PURPOSE: To easily provide isolation layers of narrow width and a field region of small wiring capacity and large area by a method wherein an Si layer of high resistance is buried in an island form inside the insulation film for element isolation on a supphire substrate.

CONSTITUTION: The Si 12 is epitaxial-formed on the supphire substrate 11, and plasma-etched by an Si3N4 mask 20, thus SiO2 21 is formed on side surfaces, and then the Si 12 is etching-removed by CF4 plasma. An Si 22 is deposited by a CVD method, then buried flat, and covered with an SiO2 film 23. A poly Si 24 is superposed, and a gate electrode 24A is formed by a resist mask 25. Ions are implanted by newly performing resist masks 26, and accordingly a source and a drain are formed. Next, it is covered with a PSG29, then an electrode window is provided, and an Al electrode is added. By this constitution, the insulation film for element isolation can be easily formed in fixed dimensions, then the degree of design freedom increases, and the floating capacity of a semiconductor device formed on the substrate reduces, accordingly the reliability improves.


Inventors:
SASAKI NOBUO
Application Number:
JP5277482A
Publication Date:
October 06, 1983
Filing Date:
March 30, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/78; H01L21/762; H01L21/86; H01L27/12; H01L29/786; (IPC1-7): H01L21/76; H01L21/86; H01L29/78
Domestic Patent References:
JPS5742143A1982-03-09
JPS55153343A1980-11-29
Attorney, Agent or Firm:
Sadaichi Igita



 
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