PURPOSE: To minimize the calculation time by providing one VLSI circuit comprising a main shift register of 2,772 bits loaded in series and a bidirectional output shift register of 132 bits loaded in parallel to load a dot image data of a character cell direct into a register without the need for converting it to a format.

CONSTITUTION: A microprocessor 24 and a dot generation logical circuit (DGL)26 are mounted on a control substrate assembly 9 and the DGL26 has a dot processor chip, a 2,772 bit dynamic main shift register, a 132 bit dynamic shift register, a character set ROM and a microprocessor interface. The shift register is equipped with taps at an uniform interval along the length thereof one for each hammer of a printer and hence, the number of memory cells between the taps corresponds to such a number of dots that a printing can be done with a hammer which arrives with the merely single passage thereof. This enables the DGL to perform a loading completely into a single long shift register during the non- printing time when the print bar changes the direction thereof.