PURPOSE: To simplify the circuit constitution, to attain the effect of reduction in number of elements and to attain especially the effect in the case of realizing a high-degree counter by activating a high-order bit with an up-carry or a down-carry from a low-order bit.

CONSTITUTION: An FF 3 is operated at a trailing edge of an up-command pulse 6 and a down-command pulse 7. When the up-command pulse 6 is inputted with the FF 3 set to '1', an up-carry 8 synchronously with the pulse 6 is outputted from an AND gate 4. Moreover, when the down-command pulse 7 is inputted with the FF 3 set to '0', a down-carry 9 synchronously with the pulse 7 is outputted from an AND gate 5. As to 2nd and succeeding stages, an FF of a stage is operated similarly by using an up-carry and a down-carry from its preceding stage as an up-command pulse and a down-command pulse.