PURPOSE: To provide frequency division output whose duty factor is approximately 50% and level is stable regardless of a set frequency division number.

CONSTITUTION: A first down counter part 89 counts the pulse number of internal frequency division signals Q' for a number P set in frequency division number setting terminals 55 to 58. A second down counter part 1 counts the pulse number of the internal frequency division signals Q' for the number P/2 set in the frequency division number setting teminals 56 to 58. A reset/output generation circuit 42 outputs an 'L' level corresponding to that the second down counter part 1 ends counting and outputs an 'H' level corresponding to that the first down counter part 89 ends the counting. Thus, the duty factor of the frequency division output OUT becomes approximately 50%.