Title:
WAFER TREATING DEVICE
Document Type and Number:
Japanese Patent JPS61236137
Kind Code:
A
Abstract:
PURPOSE:To prevent dispersion of a surface treatment from generating among wafers without allowing the wafers to mount on the residue even when the residue, such as a polymer, is adhere-deposited on the peripheral edge parts of the wafers by a method wherein grooves are formed in consideration of the conveying error of the wafers in such a way that the grooves come to the peripheral edge parts of the wafers when the wafers are conveyed on the wafer placing stand. CONSTITUTION:When the etching treatment ends, polymers 1 are adhere- deposited on the peripheral parts of a wafer W3 on a lower electrode 15. In this case, grooves 19 are formed in the region of the lower electrode in consideration of the position deviation of a wafer W4 in advance so that the wafer W4 does not mount on the polymers 1 even when the wafer W4 is positioning- placed in a state deviated a little from the wafer W3. Accordingly, a trouble that the wafer 4 mounts on the polymers 1, levitates from the lower electrode 15 and warps is eliminated. As a result, the distance between the surface of each wafer and an upper electrode 14 can be uniformly made in every wafer.
Inventors:
TEZUKA ATSUSHI
Application Number:
JP7652185A
Publication Date:
October 21, 1986
Filing Date:
April 12, 1985
Export Citation:
Assignee:
HITACHI HOKKAI SEMICONDUCTOR
HITACHI LTD
HITACHI LTD
International Classes:
H01L21/683; H01L21/302; H01L21/3065; H01L21/67; H01L21/68; H01L21/687; (IPC1-7): H01L21/302
Attorney, Agent or Firm:
Katsuo Ogawa