Title:
ANTI-FUSE MEMORY READ CIRCUIT WITH CONTROLLABLE READ TIME
Document Type and Number:
WIPO Patent Application WO/2023/098063
Kind Code:
A1
Abstract:
An anti-fuse memory read circuit with a controllable read time, which relates to the field of anti-fuse memories. In the anti-fuse memory read circuit, a read time control circuit (200) generates a control signal corresponding to a read time, and a programmable read pulse generation circuit (300) generates, on the basis of a clock signal, a read pulse having a pulse width corresponding to the control signal; and in a read amplification circuit (400), according to the read pulse and the control signal, a pull-up current source corresponding to the read time is gated and a voltage on a bit line of an anti-fuse storage unit is pulled up, and data stored in the anti-fuse storage unit (100) is read starting from a rising edge of the read pulse and is latched at a falling edge of the read pulse. The anti-fuse memory read circuit can generate, according to a required read time, a read pulse having a corresponding pulse width and a pull-up current source having a corresponding magnitude, and realizes self-defined programming control over the read time, such that the flexibility is relatively high, thereby meeting the selection of a user between an actual read speed and a power consumption requirement.
Inventors:
CAO ZHENGZHOU (CN)
ZHU JIE (CN)
ZHANG YANFEI (CN)
SUN JING (CN)
JI ZHENKAI (CN)
DING ZHENNAN (CN)
ZHU JIE (CN)
ZHANG YANFEI (CN)
SUN JING (CN)
JI ZHENKAI (CN)
DING ZHENNAN (CN)
Application Number:
PCT/CN2022/102606
Publication Date:
June 08, 2023
Filing Date:
June 30, 2022
Export Citation:
Assignee:
WUXI ESIONTECH CO LTD (CN)
International Classes:
G11C17/16; G11C16/26
Foreign References:
| CN114171096A | 2022-03-11 | |||
| CN113345506A | 2021-09-03 | |||
| CN107293331A | 2017-10-24 | |||
| CN112582013A | 2021-03-30 | |||
| US5978297A | 1999-11-02 |
Attorney, Agent or Firm:
WUXI HUAYUAN PATENT AND TRADEMARK AGENCY (GENERAL PARTNERSHIP) (CN)
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