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Title:
APPARATUS AND METHOD FOR MEASURING WITHSTAND VOLTAGE OF SEMICONDUCTOR ELEMENT
Document Type and Number:
WIPO Patent Application WO/2010/021070
Kind Code:
A1
Abstract:
Provided is a withstand voltage measuring method for measuring withstand voltages of a plurality of semiconductor elements formed on a wafer surface.  The method includes a step (A) of fixing the wafer on a stage; a step (B) of covering, with an insulating solution, only a part of the wafer surface, i.e., one or more electrodes, which are arranged on one semiconductor element selected from among at least the semiconductor elements and exposed to atmosphere, and are electrodes wherein withstand voltages are to be measured, and bringing a probe into contact with at least one of the electrodes; and a step (C) of measuring a withstand voltage between at least one of the electrodes and a point selected from the surface of the stage.

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Inventors:
KUSUMOTO OSAMU
UCHIDA MASAO
IKEGAMI RYO
Application Number:
PCT/JP2009/002088
Publication Date:
February 25, 2010
Filing Date:
May 13, 2009
Export Citation:
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Assignee:
PANASONIC CORP (JP)
KUSUMOTO OSAMU
UCHIDA MASAO
IKEGAMI RYO
International Classes:
H01L21/66; G01R31/26
Foreign References:
JPS6233433A1987-02-13
JP2003100819A2003-04-04
JP2003130889A2003-05-08
JP2000206149A2000-07-28
Attorney, Agent or Firm:
OKUDA, SEIJI (JP)
Seiji Okuda (JP)
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