INTEGRATED LINEAR RESISTANCE WITH TEMPERATURE COMPENSATION

WIPO Patent Application WO/2011/157869

A3

The invention relates to an integrated linear resistor comprising an MRC network; and a first control circuit which comprises a current mirror formed by two MOS transistors (M31, M41) polarized by an intensity source (IB1) independent of the temperature and comprises a branch with two resistors (RA1, RB1) in series, the terminal of which is connected to a first group of ports (G1) of the MRC network; wherein the value of the two resistors (RA1, RB1) is such that the variation of R1 = RA1 + RB1 compensates for the deviations caused by the temperature in RMRC.

JP2013104695	METHOD AND APPARATUS FOR MEASURING VOLTAGE OF ELEMENT TO BE INSPECTED
JPH083766	[Title of the Invention] Power supply voltage drop circuit of a semiconductor integrated circuit
JPH089780	[Name of device] Power supply circuit

VALERO BERNAL MARIA DE RODANAS (ES)
MEDRANO MARQUES NICOLAS J (ES)
CALVO LOPEZ BELEN (ES)
CELMA PUEYO SANTIAGO (ES)

PCT/ES2011/000200

March 15, 2012

June 14, 2011

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UNIV ZARAGOZA (ES)
VALERO BERNAL MARIA DE RODANAS (ES)
MEDRANO MARQUES NICOLAS J (ES)
CALVO LOPEZ BELEN (ES)
CELMA PUEYO SANTIAGO (ES)

G05F1/46

US6650176B1	2003-11-18
US20060125462A1	2006-06-15
US6348832B1	2002-02-19
FR2832819A1	2003-05-30
US20060197585A1	2006-09-07

CZARNUL, Z.: "Novel MOS resistive circuit for synthesis of fully integrated continuous-time Filters", CIRCUITS AND SYSTEMS, IEEE TRANSACTIONS ON, vol. 33, no. 7, July 1986 (1986-07-01), pages 718 - 721
TAKAGI ET AL.: "Generalized MRC [MOS resistive circuit]", CIRCUITS AND SYSTEMS, 1997. ISCAS '97, PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON, vol. 1, 9 June 1997 (1997-06-09) - 12 June 1997 (1997-06-12), pages 221 - 224

BELTRÁN BAZQUEZ, José Ramon (C/ Pedro Cerbuna 12, Zaragoza, ES)

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