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Title:
MECHANISM FOR SELECTING INSTRUCTIONS FOR EXECUTION IN A MULTITHREADED PROCESSOR
Document Type and Number:
WIPO Patent Application WO2006004830
Kind Code:
A3
Abstract:
In one embodiment, a multithreaded processor includes a plurality of buffers, each configured to store instructions corresponding to a respective thread. The multithreaded processor also includes a pick unit coupled to the plurality of buffers. The pick unit may pick from at least one of the buffers in a given cycle, a valid instruction based upon a thread selection algorithm. The pick unit may further cancel, in the given cycle, the picking of the valid instruction in response to receiving a cancel indication.

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Inventors:
GOLLA ROBERT T (US)
Application Number:
PCT/US2005/023094
Publication Date:
October 26, 2006
Filing Date:
June 30, 2005
Export Citation:
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Assignee:
SUN MICROSYSTEMS INC (US)
GOLLA ROBERT T (US)
International Classes:
G06F9/38
Foreign References:
US6470443B12002-10-22
US20040059896A12004-03-25
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