SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE

WIPO Patent Application WO/2007/023947

A1

A desired integrated circuit is obtained by bonding a plurality of semiconductor substrates and electrically connecting integrated circuits formed respectively on semiconductor chips of the semiconductor substrates. A penetrating electrode penetrating between the main plane and the rear plane of each of the semiconductor substrates and a penetrating separation section for separating the penetrating electrode are separately arranged. After forming an insulating trench section for forming the penetrating separation section on the semiconductor substrate, a MIS·FET can be formed, and then, a conductive trench section for forming the penetrating electrode can be formed. Thus, element characteristics of the semiconductor device having a three-dimensional structure can be improved.

MORIYA SATOSHI (JP)
SAITO TOSHIO (JP)
YOKOYAMA GOICHI (JP)
FUJIWARA TSUYOSHI (JP)
SATO HIDENORI (JP)
MIYAKAWA NOBUAKI (JP)

PCT/JP2006/316734

March 01, 2007

August 25, 2006

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HITACHI LTD (JP)
HONDA MOTOR CO LTD (JP)
MORIYA SATOSHI (JP)
SAITO TOSHIO (JP)
YOKOYAMA GOICHI (JP)
FUJIWARA TSUYOSHI (JP)
SATO HIDENORI (JP)
MIYAKAWA NOBUAKI (JP)

H01L21/3205; H01L21/76; H01L23/52

JPS6167932A	1986-04-08
JP2004335836A	2004-11-25
JPH03218049A	1991-09-25
JPH0521592A	1993-01-29
JPH03234041A	1991-10-18
JP2005222994A	2005-08-18
JP2005026582A	2005-01-27

TSUTSUI, Yamato (6th Floor Kokusai Chusei Kaikan, 14, Gobanch, Chiyoda-ku Tokyo 76, JP)

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